diff options
| -rw-r--r-- | backend/CMakeLists.txt | 7 | ||||
| -rw-r--r-- | backend/src/CMakeLists.txt | 21 | ||||
| -rw-r--r-- | backend/src/backend/gen_context.cpp | 17 | ||||
| -rw-r--r-- | backend/src/backend/gen_context.hpp | 2 | ||||
| -rw-r--r-- | backend/src/backend/gen_insn_selection.cpp | 31 | ||||
| -rw-r--r-- | backend/src/backend/gen_insn_selection.hpp | 36 | ||||
| -rw-r--r-- | backend/src/backend/gen_reg_allocation.cpp | 20 | ||||
| -rw-r--r-- | backend/src/backend/gen_reg_allocation.hpp | 2 | ||||
| -rw-r--r-- | backend/src/blob.cpp | 23 | ||||
| -rw-r--r-- | backend/src/ir/context.cpp | 2 | ||||
| -rw-r--r-- | backend/src/ir/lowering.cpp | 2 | ||||
| -rw-r--r-- | backend/src/llvm/llvm_gen_backend.cpp | 10 | ||||
| -rw-r--r-- | backend/src/llvm/llvm_passes.cpp | 8 | ||||
| -rw-r--r-- | backend/src/llvm/llvm_to_gen.cpp | 9 | ||||
| -rw-r--r-- | backend/src/utest/utest_vector.cpp | 2 |
15 files changed, 94 insertions, 98 deletions
diff --git a/backend/CMakeLists.txt b/backend/CMakeLists.txt index 2da62c72..6c6b8176 100644 --- a/backend/CMakeLists.txt +++ b/backend/CMakeLists.txt @@ -35,6 +35,13 @@ else (WIN32) set (DEF "-D") endif (WIN32) +# Force Release with debug info +if (NOT CMAKE_BUILD_TYPE) + set (CMAKE_BUILD_TYPE RelWithDebInfo) +endif (NOT CMAKE_BUILD_TYPE) +set (CMAKE_BUILD_TYPE ${CMAKE_BUILD_TYPE} CACHE STRING "assure config" FORCE) +message(STATUS "Building mode: " ${CMAKE_BUILD_TYPE}) + if (GBE_DEBUG_MEMORY) set (GBE_DEBUG_MEMORY_FLAG "${DEF}GBE_DEBUG_MEMORY=1") else (GBE_DEBUG_MEMORY) diff --git a/backend/src/CMakeLists.txt b/backend/src/CMakeLists.txt index bbeb3a2a..ede69119 100644 --- a/backend/src/CMakeLists.txt +++ b/backend/src/CMakeLists.txt @@ -99,18 +99,19 @@ else (GBE_USE_BLOB) backend/gen_encoder.hpp backend/gen_encoder.cpp) - if (GBE_COMPILE_UTESTS) - set (GBE_SRC - ${GBE_SRC} - utest/utest_vector.cpp - utest/utest_llvm.cpp - utest/utest_test_utest.cpp - utest/utest_context.cpp - utest/utest.cpp - utest/utest.hpp) - endif (GBE_COMPILE_UTESTS) endif (GBE_USE_BLOB) +if (GBE_COMPILE_UTESTS) + set (GBE_SRC + ${GBE_SRC} + utest/utest_vector.cpp + utest/utest_llvm.cpp + utest/utest_test_utest.cpp + utest/utest_context.cpp + utest/utest.cpp + utest/utest.hpp) +endif (GBE_COMPILE_UTESTS) + include_directories (.) link_directories (${LLVM_LIBRARY_DIRS}) add_library (gbe SHARED ${GBE_SRC}) diff --git a/backend/src/backend/gen_context.cpp b/backend/src/backend/gen_context.cpp index 82c38ca8..174adf33 100644 --- a/backend/src/backend/gen_context.cpp +++ b/backend/src/backend/gen_context.cpp @@ -35,23 +35,6 @@ namespace gbe { /////////////////////////////////////////////////////////////////////////// - // Various helper functions - /////////////////////////////////////////////////////////////////////////// - - INLINE uint32_t getGenCompare(ir::Opcode opcode) { - using namespace ir; - switch (opcode) { - case OP_LE: return GEN_CONDITIONAL_LE; - case OP_LT: return GEN_CONDITIONAL_L; - case OP_GE: return GEN_CONDITIONAL_GE; - case OP_GT: return GEN_CONDITIONAL_G; - case OP_EQ: return GEN_CONDITIONAL_EQ; - case OP_NE: return GEN_CONDITIONAL_NEQ; - default: NOT_SUPPORTED; return 0u; - }; - } - - /////////////////////////////////////////////////////////////////////////// // GenContext implementation /////////////////////////////////////////////////////////////////////////// GenContext::GenContext(const ir::Unit &unit, const std::string &name) : diff --git a/backend/src/backend/gen_context.hpp b/backend/src/backend/gen_context.hpp index 93b03055..c198fd84 100644 --- a/backend/src/backend/gen_context.hpp +++ b/backend/src/backend/gen_context.hpp @@ -79,7 +79,7 @@ namespace gbe return this->liveness->getLiveOut(bb); } - /*! Finally Gen ISA emission helper functions */ + /*! Final Gen ISA emission helper functions */ void emitLabelInstruction(const SelectionInstruction &insn); void emitUnaryInstruction(const SelectionInstruction &insn); void emitBinaryInstruction(const SelectionInstruction &insn); diff --git a/backend/src/backend/gen_insn_selection.cpp b/backend/src/backend/gen_insn_selection.cpp index 663b6e00..81f665b7 100644 --- a/backend/src/backend/gen_insn_selection.cpp +++ b/backend/src/backend/gen_insn_selection.cpp @@ -29,37 +29,6 @@ namespace gbe { /////////////////////////////////////////////////////////////////////////// - // Various helper functions - /////////////////////////////////////////////////////////////////////////// - INLINE uint32_t getGenType(ir::Type type) { - using namespace ir; - switch (type) { - case TYPE_BOOL: return GEN_TYPE_UW; - case TYPE_S8: return GEN_TYPE_B; - case TYPE_U8: return GEN_TYPE_UB; - case TYPE_S16: return GEN_TYPE_W; - case TYPE_U16: return GEN_TYPE_UW; - case TYPE_S32: return GEN_TYPE_D; - case TYPE_U32: return GEN_TYPE_UD; - case TYPE_FLOAT: return GEN_TYPE_F; - default: NOT_SUPPORTED; return GEN_TYPE_F; - } - } - - INLINE uint32_t getGenCompare(ir::Opcode opcode) { - using namespace ir; - switch (opcode) { - case OP_LE: return GEN_CONDITIONAL_LE; - case OP_LT: return GEN_CONDITIONAL_L; - case OP_GE: return GEN_CONDITIONAL_GE; - case OP_GT: return GEN_CONDITIONAL_G; - case OP_EQ: return GEN_CONDITIONAL_EQ; - case OP_NE: return GEN_CONDITIONAL_NEQ; - default: NOT_SUPPORTED; return 0u; - }; - } - - /////////////////////////////////////////////////////////////////////////// // Selection /////////////////////////////////////////////////////////////////////////// Selection::Selection(GenContext &ctx) : diff --git a/backend/src/backend/gen_insn_selection.hpp b/backend/src/backend/gen_insn_selection.hpp index 4b6ea9c6..301c1934 100644 --- a/backend/src/backend/gen_insn_selection.hpp +++ b/backend/src/backend/gen_insn_selection.hpp @@ -34,6 +34,36 @@ namespace gbe { + /*! Translate IR type to Gen type */ + INLINE uint32_t getGenType(ir::Type type) { + using namespace ir; + switch (type) { + case TYPE_BOOL: return GEN_TYPE_UW; + case TYPE_S8: return GEN_TYPE_B; + case TYPE_U8: return GEN_TYPE_UB; + case TYPE_S16: return GEN_TYPE_W; + case TYPE_U16: return GEN_TYPE_UW; + case TYPE_S32: return GEN_TYPE_D; + case TYPE_U32: return GEN_TYPE_UD; + case TYPE_FLOAT: return GEN_TYPE_F; + default: NOT_SUPPORTED; return GEN_TYPE_F; + } + } + + /*! Translate IR compare to Gen compare */ + INLINE uint32_t getGenCompare(ir::Opcode opcode) { + using namespace ir; + switch (opcode) { + case OP_LE: return GEN_CONDITIONAL_LE; + case OP_LT: return GEN_CONDITIONAL_L; + case OP_GE: return GEN_CONDITIONAL_GE; + case OP_GT: return GEN_CONDITIONAL_G; + case OP_EQ: return GEN_CONDITIONAL_EQ; + case OP_NE: return GEN_CONDITIONAL_NEQ; + default: NOT_SUPPORTED; return 0u; + }; + } + /*! The state for each instruction */ struct SelectionState { @@ -459,9 +489,8 @@ namespace gbe /*! A selection instruction is also almost a Gen instruction but *before* the * register allocation */ - class SelectionInstruction + struct SelectionInstruction { - public: INLINE SelectionInstruction(void) : parent(NULL), prev(NULL), next(NULL) {} /*! No more than 6 sources (used by typed writes) */ enum { MAX_SRC_NUM = 6 }; @@ -514,9 +543,8 @@ namespace gbe class Selection; /*! A selection block is the counterpart of the ir::block */ - class SelectionBlock + struct SelectionBlock { - public: INLINE SelectionBlock(const ir::BasicBlock *bb) : insnHead(NULL), insnTail(NULL), vector(NULL), next(NULL), bb(bb) {} /*! Minimum of temporary registers per block */ diff --git a/backend/src/backend/gen_reg_allocation.cpp b/backend/src/backend/gen_reg_allocation.cpp index 2a640c1b..4307f406 100644 --- a/backend/src/backend/gen_reg_allocation.cpp +++ b/backend/src/backend/gen_reg_allocation.cpp @@ -37,22 +37,6 @@ namespace gbe static const size_t familyVectorSize[] = {2,2,2,4,8}; static const size_t familyScalarSize[] = {2,1,2,4,8}; - /*! IR-to-Gen type conversion */ - INLINE uint32_t getGenType(ir::Type type) { - using namespace ir; - switch (type) { - case TYPE_BOOL: return GEN_TYPE_UW; - case TYPE_S8: return GEN_TYPE_B; - case TYPE_U8: return GEN_TYPE_UB; - case TYPE_S16: return GEN_TYPE_W; - case TYPE_U16: return GEN_TYPE_UW; - case TYPE_S32: return GEN_TYPE_D; - case TYPE_U32: return GEN_TYPE_UD; - case TYPE_FLOAT: return GEN_TYPE_F; - default: NOT_SUPPORTED; return GEN_TYPE_F; - } - } - /*! Interval as used in linear scan allocator. Basically, stores the first and * the last instruction where the register is alive */ @@ -118,7 +102,7 @@ namespace gbe const uint32_t regSize = simdWidth*typeSize; uint32_t grfOffset; while ((grfOffset = ctx.allocate(regSize, regSize)) == 0) { - const bool success = this->expire(interval); + IF_DEBUG(const bool success =) this->expire(interval); GBE_ASSERTM(success, "Register allocation failed"); } if (grfOffset != 0) { @@ -447,7 +431,7 @@ namespace gbe const uint32_t size = vector->regNum * alignment; uint32_t grfOffset; while ((grfOffset = ctx.allocate(size, alignment)) == 0) { - const bool success = this->expire(interval); + IF_DEBUG(const bool success =) this->expire(interval); GBE_ASSERTM(success, "Register allocation failed"); } //GBE_ASSERTM(grfOffset != 0, "Unable to register allocate"); diff --git a/backend/src/backend/gen_reg_allocation.hpp b/backend/src/backend/gen_reg_allocation.hpp index e61723d3..856ea267 100644 --- a/backend/src/backend/gen_reg_allocation.hpp +++ b/backend/src/backend/gen_reg_allocation.hpp @@ -32,7 +32,7 @@ namespace gbe { class Selection; // Pre-register allocation code generation - class SelectionReg; // Pre-register allocation Gen register + struct SelectionReg; // Pre-register allocation Gen register struct GenRegInterval; // Liveness interval for each register /*! Provides the location of a register in a vector */ diff --git a/backend/src/blob.cpp b/backend/src/blob.cpp index 9d308aa6..fa4f7303 100644 --- a/backend/src/blob.cpp +++ b/backend/src/blob.cpp @@ -25,6 +25,7 @@ * optimization from the compiler and decreases the binary size */ +#include "ocl_stdlib_str.cpp" #include "sys/assert.cpp" #include "sys/string.cpp" #include "sys/alloc.cpp" @@ -32,6 +33,7 @@ #include "sys/mutex.cpp" #include "sys/condition.cpp" #include "sys/platform.cpp" +#include "sys/cvar.cpp" #include "ir/context.cpp" #include "ir/type.cpp" #include "ir/unit.cpp" @@ -39,10 +41,19 @@ #include "ir/instruction.cpp" #include "ir/register.cpp" #include "ir/function.cpp" - -#if GBE_COMPILE_UTESTS -#include "utest/utest.cpp" -#include "utest/utest_test_utest.cpp" -#include "utest/utest_context.cpp" -#endif /* GBE_COMPILE_UTESTS */ +#include "ir/liveness.cpp" +#include "ir/value.cpp" +#include "ir/lowering.cpp" +#include "ir/profile.cpp" +#include "backend/context.cpp" +#include "backend/program.cpp" +#include "backend/sim_context.cpp" +#include "backend/sim_program.cpp" +#include "backend/sim/simulator_str.cpp" +#include "backend/sim/sim_vector_str.cpp" +#include "backend/gen_insn_selection.cpp" +#include "backend/gen_reg_allocation.cpp" +#include "backend/gen_context.cpp" +#include "backend/gen_program.cpp" +#include "backend/gen_encoder.cpp" diff --git a/backend/src/ir/context.cpp b/backend/src/ir/context.cpp index 8299970b..4c549e9d 100644 --- a/backend/src/ir/context.cpp +++ b/backend/src/ir/context.cpp @@ -66,8 +66,10 @@ namespace ir { // Check first that all branch instructions point to valid labels GBE_ASSERT(usedLabels); +#if GBE_DEBUG for (auto usage : *usedLabels) GBE_ASSERTM(usage != LABEL_IS_POINTED, "A label is used and not defined"); +#endif /* GBE_DEBUG */ GBE_DELETE(usedLabels); // Remove all returns and insert one unique return block at the end of the diff --git a/backend/src/ir/lowering.cpp b/backend/src/ir/lowering.cpp index d16cf0d1..0f0c7082 100644 --- a/backend/src/ir/lowering.cpp +++ b/backend/src/ir/lowering.cpp @@ -359,6 +359,7 @@ namespace ir { } void FunctionArgumentLowerer::lower(uint32_t argID) { +#if GBE_DEBUG const ArgUse argUse = this->getArgUse(argID); GBE_ASSERTM(argUse != ARG_WRITTEN, "TODO A store to a structure argument " @@ -367,6 +368,7 @@ namespace ir { GBE_ASSERTM(argUse != ARG_INDIRECT_READ, "TODO Only direct loads of structure arguments are " "supported now"); +#endif /* GBE_DEBUG */ } void lowerFunctionArguments(Unit &unit, const std::string &functionName) { diff --git a/backend/src/llvm/llvm_gen_backend.cpp b/backend/src/llvm/llvm_gen_backend.cpp index cbda45cc..c52f348c 100644 --- a/backend/src/llvm/llvm_gen_backend.cpp +++ b/backend/src/llvm/llvm_gen_backend.cpp @@ -448,8 +448,10 @@ namespace gbe GBE_ASSERTM(false, "Unsupported constant expression"); if (ConstantVector *CV = dyn_cast<ConstantVector>(CPV)) { +#if GBE_DEBUG const uint32_t elemNum = CV->getNumOperands(); GBE_ASSERTM(index < elemNum, "Out-of-bound constant vector access"); +#endif /* GBE_DEBUG */ CPV = cast<Constant>(CV->getOperand(index)); } @@ -659,11 +661,11 @@ namespace gbe // When returning a structure, first input register is the pointer to the // structure +#if GBE_DEBUG const Type *type = F.getReturnType(); GBE_ASSERTM(type->isVoidTy() == true, "Returned value for kernel functions is forbidden"); -#if GBE_DEBUG // Variable number of arguments is not supported FunctionType *FT = cast<FunctionType>(F.getFunctionType()); GBE_ASSERT(FT->isVarArg() == false); @@ -901,9 +903,11 @@ namespace gbe { Constant *CPV = dyn_cast<Constant>(srcValue); if (CPV == NULL) { +#if GBE_DEBUG Type *dstType = dstValue->getType(); Type *srcType = srcValue->getType(); GBE_ASSERT(getTypeByteSize(unit, dstType) == getTypeByteSize(unit, srcType)); +#endif /* GBE_DEBUG */ regTranslator.newValueProxy(srcValue, dstValue); } else this->newRegister(dstValue); @@ -1072,10 +1076,12 @@ namespace gbe "Invalid index type for InsertElement"); // Crash on overrun + const uint32_t extractedID = x.data.u32; +#if GBE_DEBUG VectorType *vectorType = cast<VectorType>(extracted->getType()); const uint32_t elemNum = vectorType->getNumElements(); - const uint32_t extractedID = x.data.u32; GBE_ASSERTM(extractedID < elemNum, "Out-of-bound index for InsertElement"); +#endif /* GBE_DEBUG */ // Easy when the vector is not immediate regTranslator.newValueProxy(extracted, &I, extractedID, 0); diff --git a/backend/src/llvm/llvm_passes.cpp b/backend/src/llvm/llvm_passes.cpp index 9d900e34..c6c33060 100644 --- a/backend/src/llvm/llvm_passes.cpp +++ b/backend/src/llvm/llvm_passes.cpp @@ -18,13 +18,15 @@ */ /** - * \file llvm_to_gen.cpp + * \file llvm_passes.cpp * \author Benjamin Segovia <benjamin.segovia@intel.com> + * \author Heldge RHodin <alice.rhodin@alice-dsl.net> */ -/* THIS CODE IS DERIVED FROM LLVM PTX BACKEND. CODE IS HERE: +/* THIS CODE IS DERIVED FROM GPL LLVM PTX BACKEND. CODE IS HERE: * http://sourceforge.net/scm/?type=git&group_id=319085 - * Note that the LICENSE is GPL + * Note that however, the original author, Heldge Rhodin, granted me (Benjamin + * Segovia) the right to use another license for it (MIT here) */ #include "llvm/CallingConv.h" diff --git a/backend/src/llvm/llvm_to_gen.cpp b/backend/src/llvm/llvm_to_gen.cpp index 0759f46f..a41f4a58 100644 --- a/backend/src/llvm/llvm_to_gen.cpp +++ b/backend/src/llvm/llvm_to_gen.cpp @@ -39,6 +39,7 @@ #include <sys/types.h> #include <sys/stat.h> #include <fcntl.h> +#include <memory> namespace gbe { @@ -52,7 +53,7 @@ namespace gbe // Get the global LLVM context llvm::LLVMContext& c = llvm::getGlobalContext(); std::string errInfo; - auto *o = new llvm::raw_fd_ostream("-", errInfo); + std::unique_ptr<llvm::raw_fd_ostream> o(new llvm::raw_fd_ostream("-", errInfo)); // Get the module from its file SMDiagnostic Err; @@ -65,7 +66,7 @@ namespace gbe // Print the code before further optimizations if (OCL_OUTPUT_LLVM_BEFORE_EXTRA_PASS) - passes.add(createPrintModulePass(o)); + passes.add(createPrintModulePass(&*o)); passes.add(createScalarReplAggregatesPass()); // Break up allocas passes.add(createRemoveGEPPass(unit)); passes.add(createConstantPropagationPass()); @@ -77,11 +78,11 @@ namespace gbe // Print the code extra optimization passes if (OCL_OUTPUT_LLVM) - passes.add(createPrintModulePass(o)); + passes.add(createPrintModulePass(&*o)); passes.run(mod); // raw_fd_ostream closes stdout. We must reopen it - delete o; + o = NULL; int fd; fd = open("/dev/tty", O_WRONLY); stdout = fdopen(fd, "w"); diff --git a/backend/src/utest/utest_vector.cpp b/backend/src/utest/utest_vector.cpp index 816c34df..a7c8e42c 100644 --- a/backend/src/utest/utest_vector.cpp +++ b/backend/src/utest/utest_vector.cpp @@ -35,7 +35,7 @@ static INLINE bool ok(uint16_t x, uint16_t y) { return x == y; } TYPE tmp[32];\ STORE(DST, (char*) tmp);\ for (uint32_t i = 0; i < elemNum(DST); ++i) {\ - const TYPE verification = ELEM0 OP ELEM1;\ + IF_DEBUG(const TYPE verification = ELEM0 OP ELEM1);\ GBE_ASSERT(ok(verification, tmp[i]));\ }\ } while (0); |
